In a trench gate metal-oxide-silicon field-effect transistor (MOSFET), which is a kind of a trench gate semiconductor device, a gate is placed in a trench formed on a semiconductor device. FIG. 1 is a sectional view illustrating a MOSFET structure having a trench gate. As shown in FIG. 1, an insulating film is formed over inner surfaces of a plurality of trenches formed on a semiconductor substrate, and a gate poly 1 is deposited over the insulating film such that it fills the trenches. Thus, trench gates are formed.
An etchback or chemical mechanical polishing (CMP) process is carried out after the deposition of the gate poly 1 in the trenches, in order to planarize the entire upper surface of the resulting structure. However, the process used for planarization, for example, the etchback process, may increase a possibility that a gate oxide film positioned is attacked at the top of each trench gate in a region indicated by a circle 2 in FIG. 1. Degraded gate-source leakage characteristics may result.
Furthermore, in related cases, the trench gates have a limited spacing, in order to secure a sufficient margin for a photo process to form source electrodes. For this reason, it is difficult to fabricate a semiconductor device having a small cell pitch.